Renato Perez Ribas

Dados pessoais

Lattes
Grupos de Pesquisa
Genealogia Acadêmica

Nacionalidade: Brasileira
Grande área de atuação: Engenharias
Área de atuação: Engenharia Elétrica

Publicações

Total: 210

Área temática ASJC

Percentual das publicações classificadas

HS Ciências da Saúde
LS Ciências da Vida
MU Multidisciplinar
PS Ciências Físicas
SH Ciências Sociais e Humanidades

Categoria ASJC

Categorias ASJC mais frequentes

Nome	Vínculo	Grande área de atuação	Área de atuação
Nome	Vínculo	Grande área de atuação	Área de atuação
Airam Teresa Zago Romcy SAUSEN		Ciências Exatas e da Terra	Matemática
Dante Augusto Couto BARONE		Ciências Exatas e da Terra	Ciência da Computação
Leomar Soares Da Rosa JUNIOR		Ciências Exatas e da Terra	Ciência da Computação

Figura 1

Número de publicações por ano e por tipo

Todas as publicações do perfil

Figura 2

Categorias ASJC mais frequentes por ano

A cor dos pontos identifica a categoria predominante

Figura 3

Mapa de calor das categorias ASJC por ano

Frequências absolutas; cores mais escuras indicam mais publicações. Todas as categorias ASJC e anos disponíveis, sem aplicar os filtros da página.

Escala: 0 → 9

Mapa de calor das categorias ASJC por ano
Categoria ASJC	1989	1990	1991	1992	1993	1994	1995	1996	1997	1998	1999	2000	2001	2002	2003	2004	2005	2006	2007	2008	2009	2010	2011	2012	2013	2014	2015	2016	2017	2018	2019	2020	2021	2022	2023	2024	2025
1708 · Hardware and Architecture	2	5	0	1	0	1	1	0	1	1	1	2	2	3	1	3	0	4	4	2	6	0	5	3	9	1	6	0	0	1	1	0	0	0	2	0	0
2208 · Electrical and Electronic Engineering	0	2	2	0	1	0	1	5	1	4	2	1	2	1	1	3	1	2	1	1	4	5	2	1	6	3	3	1	1	0	0	0	0	0	0	2	0
1703 · Computational Theory and Mathematics	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	3	0	0	0	0	3	1	1	1	0	3	0	0	0	2	0	0	0	0	0	0
1706 · Computer Science Applications	0	0	0	0	0	0	0	0	0	0	1	1	1	2	0	0	1	0	1	0	0	1	0	0	0	0	2	0	2	0	0	0	1	0	0	0	0
1701 · Computer Science (miscellaneous)	0	0	0	0	0	0	0	0	0	0	0	0	1	1	0	0	0	0	2	1	1	0	0	0	0	3	1	0	0	0	0	0	0	1	0	0	0
2209 · Industrial and Manufacturing Engineering	0	0	0	0	0	0	0	0	1	0	1	1	0	0	2	0	0	0	0	1	0	0	0	1	0	1	0	2	0	0	0	0	0	0	0	0	0
1704 · Computer Graphics and Computer-Aided Design	0	0	0	0	0	0	0	0	0	0	1	0	2	0	0	1	0	0	0	0	0	0	0	0	0	0	0	1	0	1	1	0	0	1	0	0	0
2609 · Logic	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0	0	0	0	1	0	0	1	0	0	2	0	0	1	0	0	0	0	0	0	0
2614 · Theoretical Computer Science	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0	0	1	0	1	0	0	0	1	0	0	0	0	0	0	0
3304 · Education	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	2	1	1	0	0	0	0	0	0	0
1702 · Artificial Intelligence	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	2	0	0	0	0	0	0	1	0	0	0	0	0	0	0
2210 · Mechanical Engineering	0	0	0	0	0	0	0	0	0	0	0	2	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0
2504 · Electronic; Optical and Magnetic Materials	0	0	1	0	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0
2607 · Discrete Mathematics and Combinatorics	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	0	1
1508 · Process Chemistry and Technology	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0
1707 · Computer Vision and Pattern Recognition	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0
2501 · Materials Science (miscellaneous)	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0
2601 · Mathematics (miscellaneous)	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0	0	0	0	0

Ano	Tipo	Registro	Área temática e categoria ASJC
	Tipo de Publicação	Registro	Área temática e categoria ASJC
2014	Trabalho em evento	CMOS inverter analytical delay model considering all operating regions Marranghello Felipe S; Reis Andre I; Renato Perez RIBAS 2014 IEEE International Symposium on Circuits and Systems (ISCAS) DOI 10.1109/ISCAS.2014.6865419 ISBN 9781479934324	PS Electrical and Electronic Engineering
2014	Trabalho em evento	Deriving Reduced Transistor Count Circuits from AIGs Matos Jody MAICK; Ritt MARCUS; Renato Perez RIBAS; Reis ANDRÉ the 27th Symposium DOI 10.1145/2660540.2661008 ISBN 9781450331562	PS Computer Science (miscellaneous)
2014	Trabalho em evento	Exploring Independent Gates in FinFET-Based Transistor Network Generation Possani Vinicius N; Reis André I; Renato Perez RIBAS; Marques Felipe S; Da Rosa Junior Leomar S the 27th Symposium DOI 10.1145/2660540.2661009 ISBN 9781450331562	PS Electrical and Electronic Engineering
2014	Trabalho em evento	Exploring factored forms for sequential implication logic synthesis Marranghello Felipe S; Martins Mayler G A; Callegaro VINICIUS; Reis Andre I; Renato Perez RIBAS 2014 IEEE 14th International Conference on Nanotechnology (IEEENANO) DOI 10.1109/nano.2014.6967991 ISBN 9781479956227	PS Theoretical Computer Science
2014	Trabalho em evento	Majority-based logic synthesis for nanometric technologies Martins Mayler G A; Callegaro VINICIUS; Marranghello Felipe S; Renato Perez RIBAS; Reis Andre I 2014 IEEE 14th International Conference on Nanotechnology (IEEENANO) DOI 10.1109/nano.2014.6968043 ISBN 9781479956227	PS Hardware and Architecture
2014	Artigo em periódico	A Domain-Transformation Approach to Synthesize Read-Polarity-Once Boolean Functions Vinicius CALLEGARO; Mayler G A MARTINS; Renato Perez RIBAS; André I REIS JICS. Journal of Integrated Circuits and Systems (Ed. Português) ISSN 1807-1953	PS Computer Science (miscellaneous)
2013	Trabalho em evento	CMOS inverter delay model based on DC transfer curve for slow input Marranghello Felipe S; Reis Andre I; Renato Perez RIBAS 2013 14th International Symposium on Quality Electronic Design (ISQED) DOI 10.1109/ISQED.2013.6523679 ISBN 9781467349536	PS Electrical and Electronic Engineering
2013	Trabalho em evento	Efficient transistor-level design of CMOS gates Possani Vinicius NEVES; Callegaro VINICIUS; André Inácio REIS; Renato Perez RIBAS; Felipe De Souza MARQUES et al the 23rd ACM international conference DOI 10.1145/2483028.2483089 ISBN 9781450320320	PS Hardware and Architecture
2013	Trabalho em evento	Improving the methodology to build non-series-parallel transistor arrangements Possani Vinicius N; Callegaro VINICIUS; Reis Andre I; Renato Perez RIBAS; Marques Felipe S et al 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI) DOI 10.1109/SBCCI.2013.6644854 ISBN 9781479911325	PS Electrical and Electronic Engineering
2013	Trabalho em evento	A methodology to evaluate the aging impact on flip-flops performance Nunes CICERO; Butzen Paulo F; Reis Andre I; Renato Perez RIBAS 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI) DOI 10.1109/SBCCI.2013.6644860 ISBN 9781479911325	PS Hardware and Architecture
2013	Trabalho em evento	Read-polarity-once Boolean functions Callegaro VINICIUS; Martins Mayler G A; Renato Perez RIBAS; Reis Andre I 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI) DOI 10.1109/SBCCI.2013.6644862 ISBN 9781479911325	PS Computational Theory and Mathematics
2013	Trabalho em evento	Power consumption analysis in static CMOS gates Wiltgen ALBERTO; Escobar Kim A; Reis Andre I; Renato Perez RIBAS 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI) DOI 10.1109/SBCCI.2013.6644863 ISBN 9781479911325	PS Electrical and Electronic Engineering
2013	Trabalho em evento	Delay model for static CMOS complex gates Marranghello Felipe S; Reis Andre I; Renato Perez RIBAS 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI) DOI 10.1109/SBCCI.2013.6644864 ISBN 9781479911325	PS Electrical and Electronic Engineering
2013	Trabalho em evento	Synthesis of threshold logic gates to nanoelectronics Neutzling AUGUSTO; Martins Mayler G A; Renato Perez RIBAS; Reis Andre I 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI) DOI 10.1109/SBCCI.2013.6644871 ISBN 9781479911325	PS Hardware and Architecture
2013	Trabalho em evento	Analytical logical effort formulation for minimum active area under delay constraints Alegretti Caio G P; Dal Bem VINICIUS; Renato Perez RIBAS; Reis Andre I 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI) DOI 10.1109/SBCCI.2013.6644872 ISBN 9781479911325	PS Hardware and Architecture
2013	Trabalho em evento	Spin diode network synthesis using functional composition Martins Mayler G A; Marranghello Felipe S; Friedman Joseph S; Sahakian Alan V; Renato Perez RIBAS et al 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI) DOI 10.1109/SBCCI.2013.6644873 ISBN 9781479911325	PS Electrical and Electronic Engineering
2013	Trabalho em evento	Parallel prefix adder design using quantum-dot cellular automata Escobar Kim A; Renato Perez RIBAS 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI) DOI 10.1109/SBCCI.2013.6644887 ISBN 9781479911325	PS Hardware and Architecture
2013	Trabalho em evento	Fast and Effective P-Matching Method Based on Bipartite Graph Anderson Santos Da SILVA; Reis A I; Renato Perez RIBAS XIII Microelectronics Student Forum	PS Computer Vision and Pattern Recognition
2013	Trabalho em evento	Logic synthesis for manufacturability considering regularity and lithography printability Machado LUCAS; Dal Bem VINICIUS; Moll FRANCESC; Gomez SERGIO; Renato Perez RIBAS et al 2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) DOI 10.1109/ISVLSI.2013.6654638 ISBN 9781479913312	PS Hardware and Architecture
2013	Trabalho em evento	Iterative remapping respecting timing constraints Machado LUCAS; Martins Mayler G A; Callegaro VINICIUS; Renato Perez RIBAS; Reis Andre I 2013 IEEE Computer Society Annual Symposium on VLSI (ISVLSI) DOI 10.1109/ISVLSI.2013.6654639 ISBN 9781479913312	PS Hardware and Architecture
2013	Trabalho em evento	Transistor-level optimization of CMOS complex gates Possani Vinicius N; Marques Felipe S; Da Rosa Junior Leomar S; Callegaro VINICIUS; Reis Andre I et al 2013 IEEE 4th Latin American Symposium on Circuits and Systems (LASCAS) DOI 10.1109/LASCAS.2013.6519029 ISBN 9781467349000	PS Electrical and Electronic Engineering
2013	Artigo em periódico	BTI; HCI and TDDB aging impact in flip-flops Cícero NUNES; Butzen P F; Reis A I; Renato Perez RIBAS Microelectronics and Reliability DOI 10.1016/j.microrel.2013.07.044 ISSN 0026-2714	PS Hardware and Architecture
2013	Artigo em periódico	BTI and HCI first-order aging estimation for early use in standard cell technology mapping Butzen P F; Vinicius Dal BEM; Reis A I; Renato Perez RIBAS MICROELECTRONICS RELIABILITY DOI 10.1016/j.microrel.2013.07.087 ISSN 0026-2714	PS Hardware and Architecture
2012	Trabalho em evento	Functional composition: a new paradigm for performing logic synthesis Mayler G A MARTINS; Renato Perez RIBAS; Andre Inacio REIS IEEE International Symposium on Quality Electronic Design DOI 10.1109/ISQED.2012.6187500	PS Computational Theory and Mathematics
2012	Trabalho em evento	Learning CMOS logic gate design by exploring switch network domain Renato Perez RIBAS; Vinicius CALLEGARO; Leomar Da Rosa JR; Andre Inacio REIS Interdisciplinary Engineering Design Education Conference DOI 10.1109/IEDEC.2012.6186924	PS Industrial and Manufacturing Engineering

2014 Trabalho em evento

PS Electrical and Electronic Engineering

CMOS inverter analytical delay model considering all operating regions

2014 IEEE International Symposium on Circuits and Systems (ISCAS)

Marranghello Felipe S; Reis Andre I; Renato Perez RIBAS

DOI ISBN 9781479934324

2014 Trabalho em evento

PS Computer Science (miscellaneous)

Deriving Reduced Transistor Count Circuits from AIGs

the 27th Symposium

Matos Jody MAICK; Ritt MARCUS; Renato Perez RIBAS; Reis ANDRÉ

DOI ISBN 9781450331562

2014 Trabalho em evento

PS Electrical and Electronic Engineering

Exploring Independent Gates in FinFET-Based Transistor Network Generation

the 27th Symposium

Possani Vinicius N; Reis André I; Renato Perez RIBAS; Marques Felipe S; Da Rosa Junior Leomar S

DOI ISBN 9781450331562

2014 Trabalho em evento

PS Theoretical Computer Science

Exploring factored forms for sequential implication logic synthesis

2014 IEEE 14th International Conference on Nanotechnology (IEEENANO)

Marranghello Felipe S; Martins Mayler G A; Callegaro VINICIUS; Reis Andre I; Renato Perez RIBAS

DOI ISBN 9781479956227

2014 Trabalho em evento

PS Hardware and Architecture

Majority-based logic synthesis for nanometric technologies

2014 IEEE 14th International Conference on Nanotechnology (IEEENANO)

Martins Mayler G A; Callegaro VINICIUS; Marranghello Felipe S; Renato Perez RIBAS; Reis Andre I

DOI ISBN 9781479956227

2014 Artigo em periódico

PS Computer Science (miscellaneous)

A Domain-Transformation Approach to Synthesize Read-Polarity-Once Boolean Functions

JICS. Journal of Integrated Circuits and Systems (Ed. Português)

Vinicius CALLEGARO; Mayler G A MARTINS; Renato Perez RIBAS; André I REIS

ISSN 1807-1953

2013 Trabalho em evento

PS Electrical and Electronic Engineering

CMOS inverter delay model based on DC transfer curve for slow input

2013 14th International Symposium on Quality Electronic Design (ISQED)

Marranghello Felipe S; Reis Andre I; Renato Perez RIBAS

DOI ISBN 9781467349536

2013 Trabalho em evento

PS Hardware and Architecture

Efficient transistor-level design of CMOS gates

the 23rd ACM international conference

Possani Vinicius NEVES; Callegaro VINICIUS; André Inácio REIS; Renato Perez RIBAS; Felipe De Souza MARQUES et al

DOI ISBN 9781450320320

2013 Trabalho em evento

PS Electrical and Electronic Engineering

Improving the methodology to build non-series-parallel transistor arrangements